Interrupts

Table of Contents

• Interrupt stack
• Interrupt types

Interrupt stack

TNeo provides a separate stack for interrupt handlers. This approach could save a lot of RAM: interrupt can happen at any moment of time, and if there's no separate interrupt stack, then each task should have enough stack space for the worse case of interrupt nesting.

Assume application's ISRs take max 64 words (64 * 4 = 256 bytes on PIC32) and application has 4 tasks (plus one idle task). Then, each of 5 tasks must have 64 words for interrupts: 64 * 5 * 4 = 1280 bytes of RAM just for 64 words for ISR.

With separate stack for interrupts, these 64 words should be allocated just once. Interrupt stack array should be given to tn_sys_start(). For additional information, refer to the section Starting the kernel.

The way a separate interrupt stack is implemented is architecture-specific, as well as the way to define an ISR: some platforms require kernel-provided macro for that, some don't. Refer to the section for particular architecture:

• PIC32 interrupts,
• PIC24/dsPIC interrupts.
• Cortex-M interrupts.

Interrupt types

On some platforms (namely, on PIC24/dsPIC), there are two types of interrups: system interrupts and user interrupts. Other platforms have system interrupts only. Kernel services are allowed to call only from system interrupts, and interrupt-related kernel services (tn_arch_sr_save_int_dis(), tn_arch_sr_restore(), _tn_arch_inside_isr(), etc) affect only system interrupts. Say, if _tn_arch_inside_isr() is called from user interrupt, it returns 0.

Particular platform might have additional constraints for each of these interrupt types, refer to the details of each supported platform for details.