Context switch

The context switch is implemented using the core software 0 interrupt (CS0), which is configured by the kernel to the lowest priority (1). This interrupt is handled completely by the kernel, application should never touch it.

The interrupt priority level 1 should not be configured to use shadow register sets.

Multi-vectored interrupt mode should be enabled.

Attention: if tneokernel is built as a separate library, then the file src/arch/pic32/tn_arch_pic32_int_vec1.S must be included in the main project itself, in order to dispatch vector1 (core software interrupt 0) correctly. Do note that if we include this file in the TNeoKernel library project, it doesn't work for vector, unfortunately.; If you forgot to include this file, you got an error on the link step, like this:
undefined reference to `_you_should_add_file___tn_arch_pic32_int_vec1_S___to_the_project'

Which is much more informative than if you just get to _DefaultInterrupt when it's time to switch context.

Interrupts

For generic information about interrupts in TNeoKernel, refer to the page Interrupts.

PIC32 port has system interrupts only, there are no user interrupts.

PIC32 port supports nested interrupts. The kernel provides C-language macros for calling C-language interrupt service routines, which can use either MIPS32 or MIPS16e mode. Both software and shadow register interrupt context saving is supported. Usage is as follows:

/* Timer 1 interrupt handler using software interrupt context saving */
tn_p32_soft_isr(_TIMER_1_VECTOR)
{
   /* here is your ISR code, including clearing of interrupt flag, and so on */
}
/* High-priority UART interrupt handler using shadow register set */
tn_p32_srs_isr(_UART_1_VECTOR)
{
   /* here is your ISR code, including clearing of interrupt flag, and so on */
}

In spite of the fact that the kernel provides separate stack for interrupt, this isn't a mandatory on PIC32: you're able to define your ISR in a standard way, making it use stask of interrupted task and work a bit faster. Like this:

void __ISR(_TIMER_1_VECTOR) timer_1_isr(void)
{
   /* here is your ISR code, including clearing of interrupt flag, and so on */
}

There is always a tradeoff. There are no additional constraints on ISR defined without kernel-provided macro: in either ISR, you can call the same set of kernel services.

When you make a decision on whether particular ISR should use separate stack, consider the following:

When ISR is defined in a standard way, and no function is called from that ISR, only necessary registers are saved on stack. If you have such an ISR (that doesn't call any function), and this ISR should work very fast, consider using standard way instead of kernel-provided macro.
When ISR is defined in a standard way, but it calls any function and doesn't use shadow register set, compiler saves (almost) full context on the task's stack, because it doesn't know which registers are used inside the function. In this case, it usually makes more sense to use kernel-provided macro (see below).
Kernel-provided interrupt macros switch stack pointer between interrupt stack and task stack automatically, it takes additional time: e.g. on PIC32 it's about 20 cycles.
Kernel-provided interrupt macro that doesn't use shadow register set always saves (almost) full context on the interrupt stack, independently of whether any function is called from an ISR.
Kernel-provided interrupt macro that uses shadow register set saves a little amount of registers on the interrupt stack.

Building

For generic information on building TNeoKernel, refer to the page Building the project.

MPLABX project for PIC32 port resides in the src/arch/pic32/tneokernel_pic32.X directory. This is a library project in terms of MPLABX, so if you use MPLABX you can easily add it to your main project by right-clicking Libraries -> Add Library Project .... Alternatively, of course you can just build it and use resulting tneokernel_pic32.X.a file in whatever way you like.

Table of Contents

Context switch

Interrupts

Building