45 #ifndef _TN_ARCH_CORTEX_M_H 46 #define _TN_ARCH_CORTEX_M_H 53 #include "../tn_arch_detect.h" 54 #include "../../core/tn_cfg_dispatch.h" 74 #ifndef DOXYGEN_SHOULD_SKIP_THIS 76 #define _TN_CORTEX_INTSAVE_DATA_INVALID 0xffffffff 79 # define _TN_CORTEX_INTSAVE_CHECK() \ 81 if (TN_INTSAVE_VAR == _TN_CORTEX_INTSAVE_DATA_INVALID){ \ 82 _TN_FATAL_ERROR(""); \ 86 # define _TN_CORTEX_INTSAVE_CHECK() 89 #if defined(__TN_ARCHFEAT_CORTEX_M_ARMv7M_ISA__) 96 #define _TN_FFS(x) ffs_asm(x) 108 #if defined(__TN_COMPILER_IAR__) 109 # define _TN_FATAL_ERRORF(error_msg, ...) \ 112 # define _TN_FATAL_ERRORF(error_msg, ...) \ 113 {__asm__ volatile("bkpt #0");} 140 #if defined(__TN_COMPILER_ARMCC__) 142 # define TN_ARCH_STK_ATTR_BEFORE __align(8) 143 # define TN_ARCH_STK_ATTR_AFTER 145 #elif defined(__TN_COMPILER_GCC__) || defined(__TN_COMPILER_CLANG__) 147 # define TN_ARCH_STK_ATTR_BEFORE 148 # define TN_ARCH_STK_ATTR_AFTER __attribute__((aligned(0x08))) 150 #elif defined(__TN_COMPILER_IAR__) 152 # define TN_ARCH_STK_ATTR_BEFORE 153 # define TN_ARCH_STK_ATTR_AFTER 158 #if defined(__TN_ARCHFEAT_CORTEX_M_FPU__) 159 # define _TN_CORTEX_FPU_CONTEXT_SIZE 32 161 # define _TN_CORTEX_FPU_CONTEXT_SIZE 0 169 #define TN_MIN_STACK_SIZE (17 \ 170 + _TN_STACK_OVERFLOW_SIZE_ADD \ 171 + _TN_CORTEX_FPU_CONTEXT_SIZE \ 177 #define TN_INT_WIDTH 32 198 #define TN_PRIORITIES_MAX_CNT TN_INT_WIDTH 204 #define TN_WAIT_INFINITE (TN_TickCnt)0xFFFFFFFF 209 #define TN_FILL_STACK_VAL 0xFEEDFACE 218 #define TN_INTSAVE_VAR tn_save_status_reg 232 #define TN_INTSAVE_DATA \ 233 TN_UWord TN_INTSAVE_VAR = _TN_CORTEX_INTSAVE_DATA_INVALID; 242 #define TN_INTSAVE_DATA_INT TN_INTSAVE_DATA 270 #define TN_INT_DIS_SAVE() TN_INTSAVE_VAR = tn_arch_sr_save_int_dis() 271 #define TN_INT_RESTORE() _TN_CORTEX_INTSAVE_CHECK(); \ 272 tn_arch_sr_restore(TN_INTSAVE_VAR) 281 #define TN_INT_IDIS_SAVE() TN_INT_DIS_SAVE() 290 #define TN_INT_IRESTORE() TN_INT_RESTORE() 295 #define TN_IS_INT_DISABLED() (_tn_arch_is_int_disabled()) 300 #define _TN_CONTEXT_SWITCH_IPEND_IF_NEEDED() \ 301 _tn_context_switch_pend_if_needed() 308 #define _TN_SIZE_BYTES_TO_UWORDS(size_in_bytes) ((size_in_bytes) >> 2) 310 #if defined(__TN_COMPILER_ARMCC__) 311 # if TN_FORCED_INLINE 312 # define _TN_INLINE __forceinline 314 # define _TN_INLINE __inline 316 # define _TN_STATIC_INLINE static _TN_INLINE 317 # define _TN_VOLATILE_WORKAROUND 318 #elif defined(__TN_COMPILER_GCC__) || defined(__TN_COMPILER_CLANG__) 319 # if TN_FORCED_INLINE 320 # define _TN_INLINE inline __attribute__ ((always_inline)) 322 # define _TN_INLINE inline 324 # define _TN_STATIC_INLINE static _TN_INLINE 325 # define _TN_VOLATILE_WORKAROUND 326 #elif defined(__TN_COMPILER_IAR__) 327 # if TN_FORCED_INLINE 328 # define _TN_INLINE _Pragma("inline=forced") 330 # define _TN_INLINE inline 338 # define _TN_STATIC_INLINE _TN_INLINE static 339 # define _TN_VOLATILE_WORKAROUND volatile 341 # error unknown Cortex compiler 344 #define _TN_ARCH_STACK_PT_TYPE _TN_ARCH_STACK_PT_TYPE__FULL 345 #define _TN_ARCH_STACK_DIR _TN_ARCH_STACK_DIR__DESC 347 #endif //-- DOXYGEN_SHOULD_SKIP_THIS 363 #endif // _TN_ARCH_CORTEX_M_H unsigned int TN_UIntPtr
Unsigned integer type that is able to store pointers.
unsigned int TN_UWord
Unsigned integer type whose size is equal to the size of CPU register.